MIST Lab Research
AI Security Research
IoT Security Solutions
MIST Lab - Dr. Sk. Subidh Ali

Dr. Sk. Subidh Ali, Principal Investigator

Our Research Mission

We believe that with great power comes great responsibility. Modern technologies—deep neural networks, cryptographic systems, and IoT devices—possess tremendous potential to improve lives and solve critical problems. Our mission is to ensure these powerful technologies remain secure and trustworthy as they become more prevalent in society.

Securing the Intelligent and Connected World

The Machine Intelligence & Security of Things (MIST) Lab at IIT Bhilai is dedicated to addressing the security challenges of the modern era. As artificial intelligence systems become more sophisticated and ubiquitous, and as billions of devices connect to form the Internet of Things, ensuring their security is paramount.

Under the leadership of Dr. Sk. Subidh Ali, our team of researchers focuses on developing innovative security solutions across three interconnected domains: securing artificial intelligence systems, protecting cryptographic implementations, and ensuring the safety of IoT ecosystems.

Artificial Intelligence Security

Deep neural networks have revolutionized artificial intelligence, enabling remarkable applications in computer vision, natural language processing, and autonomous systems. However, recent research has shown that these sophisticated models can be deceived by imperceptible adversarial perturbations—carefully crafted inputs designed to fool AI systems.

MIST Lab investigates the mechanisms of adversarial attacks on machine learning systems and develops robust defenses. We also address the emerging threat of deepfakes—synthetic media created using generative models that can convincingly impersonate real people. Our research ensures that AI systems remain reliable in real-world deployments where security is critical.

Cryptographic Implementation Security

While cryptographic algorithms are mathematically proven to be secure, their physical implementations in hardware can be vulnerable to sophisticated attacks. Power analysis, electromagnetic side-channels, and fault injection attacks can compromise encryption keys and protected data.

Our team pioneered research on scan-based attacks that exploit test infrastructure in modern chips. We develop provably secure defenses and analyze emerging vulnerabilities in cryptographic hardware, ensuring that encryption remains practical and trustworthy across all application domains.

IoT and Smart Infrastructure Security

The Internet of Things has transformed modern society. Billions of connected devices—from wearables and smart homes to industrial systems and critical infrastructure—create unprecedented opportunities. However, they also create new vulnerabilities.

Historically, IoT devices were designed prioritizing cost and performance over security. The 2016 Mirai botnet attack, which compromised millions of unsecured IoT devices and disrupted major services worldwide, highlighted the critical need for secure IoT design. MIST Lab develops security solutions that balance efficiency, cost-effectiveness, and robust protection—ensuring IoT devices can safely support smart cities, intelligent healthcare systems, and critical infrastructure.

Why MIST Lab?

The convergence of AI, cryptography, and IoT creates complex security challenges that require interdisciplinary expertise. MIST Lab uniquely addresses these challenges through:

  • Comprehensive Approach: Integrating research across AI security, hardware security, and IoT to understand interactions between domains
  • Practical Focus: Developing solutions that work in real-world scenarios with genuine constraints
  • Academic Excellence: Publishing in premier venues and collaborating with leading institutions worldwide
  • Impact-Driven: Creating security technologies that protect critical infrastructure and improve lives

Research Areas

MIST Lab conducts cutting-edge research across three interconnected domains: AI Security (adversarial robustness and deepfake detection), Cyber Security (cryptanalysis and hardware security), and IoT Security (secure device design and wireless communication protection). Our holistic approach addresses the security challenges of modern intelligent and connected systems.

🤖 AI Security Research

Adversarial Machine Learning

Machine learning systems have become integral to critical applications, from autonomous vehicles to medical diagnosis. However, these systems are vulnerable to adversarial attacks—carefully crafted inputs designed to fool AI models.

Our Research: We investigate the mechanisms behind adversarial perturbations and develop robust defenses to protect deep neural networks. Our work includes:

  • Attack Development: Creating gradient-guided adversarial patches that can fool vision-based ML systems
  • Defense Mechanisms: Developing adversarial training and detection techniques to enhance model robustness
  • Feature Space Analysis: Understanding the underlying vulnerabilities in neural network feature representations
  • Real-world Impact Assessment: Evaluating implications for autonomous systems and security-critical applications
Adversarial Perturbation Neural Network with Attack

Deepfake Detection & Media Authentication

AUTHENTIC DEEPFAKE Natural artifacts Consistent lighting Valid frequencies Real metadata GAN artifacts Blending anomalies Freq. mismatch Style inconsistent Detection Framework

Deepfake technology—using GANs and deep learning to synthesize realistic fake videos—poses significant risks to information integrity, personal reputation, and democratic processes. Detecting these sophisticated forgeries is a critical challenge.

Our Research: We develop machine learning models and techniques to detect synthetic media while defending against adversarial attacks on detection systems. Our contributions include:

  • Style-Based Detection: De-Fake approach using style analysis and anomaly detection patterns
  • Attribution Methods: Generalized deepfake attribution to identify synthesis techniques used
  • Robustness Against Attacks: SHIELD framework for defending detectors against adversarial perturbations
  • Image Authentication: Watermarking and copyright protection for digital media

🔐 Cyber Security & Hardware Trust

Cryptographic Implementation Security

While cryptographic algorithms are mathematically sound, their physical implementations in hardware can be vulnerable to various attacks. Our research protects cryptographic systems from both theoretical and practical threats.

Our Research Focuses On:

  • Differential Fault Analysis (DFA): Understanding how fault injection can break encryption algorithms like AES, Twofish, and CLEFIA
  • Side-Channel Attacks: Power analysis, electromagnetic analysis, and timing attacks on cryptographic chips
  • Countermeasures: Developing cost-effective defense mechanisms for secure implementations
  • Certification Support: Helping design chips that resist modern cryptanalytic attacks
Secure Hardware Encrypt Verify Protect Fault Injection Side Channel Timing Attacks

Scan-Based Attacks & Design-for-Test Security

Scan Chain Attack IN FF1 FF2 FF3 FF4 OUT Secret Data Leakage DefScan Protection

Modern integrated circuits use scan-based Design-for-Testability (DfT) to improve manufacturing test coverage. However, this test infrastructure can become a backdoor, allowing attackers to extract secret information from supposedly secure chips.

Our Research: We have been pioneers in identifying and defending against scan-based attacks. Key contributions include:

  • Vulnerability Analysis: New scan attack techniques against state-of-the-art defense mechanisms
  • DefScan Framework: Provably secure defense mechanisms against scan attacks on AES-like ciphers
  • Scan Obfuscation: Security analysis of existing obfuscation techniques with improved countermeasures
  • Hamming Weight Distribution: Novel perspective on securing cryptographic ICs

Side-Channel Analysis

Electronic devices leak information through physical side channels—power consumption, electromagnetic radiation, and timing variations. These leakages can compromise even mathematically secure encryption.

Our Research: We study and develop defenses against various side-channel attacks:

  • Power Analysis: Differential and Correlation Power Analysis (DPA/CPA) on cryptographic implementations
  • EM Analysis: Electromagnetic side-channel attacks on wireless devices, smart cards, and IoT systems
  • Timing Attacks: Extracting secrets through execution time variations in NEMS relay and traditional circuits
  • Countermeasures: Masking, hiding, and detection techniques for implementation-level protection
Cryptographic Device Power EM Timing Key Physical Information Leakage

Logic Locking & Hardware IP Protection

Logic Locking Protection Functional Logic Locking Logic Key Input (Unlock Only) Reverse Eng. Blocked Authorized Access

With globalized chip manufacturing, protecting intellectual property against reverse engineering and unauthorized modifications is critical. Logic locking provides a promising solution.

Our Work: We analyze security improvements and countermeasures against state-of-the-art attacks on locked circuits, ensuring IP remains protected throughout the supply chain.

📱 IoT & Wireless Security

IoT Device Security

The Internet of Things has transformed our world—from smart homes and wearables to industrial systems and critical infrastructure. However, IoT devices often sacrifice security for cost and performance, creating massive attack surfaces.

MIST Lab's Vision: Develop secure IoT solutions that balance functionality, cost-effectiveness, and robust security without compromising device capabilities.

Research Directions:

  • Low-Power Secure Design: Cryptographic implementations optimized for resource-constrained IoT devices
  • Threat Modeling: Understanding vulnerabilities in deployed IoT ecosystems
  • Device Authentication: Secure device identification and mutual authentication in IoT networks
  • Side-Channel Resilience: Protecting battery-powered devices from power and EM analysis attacks
  • Hardware Trojans Detection: Identifying malicious modifications in IoT hardware
Secure IoT Ecosystem Smart Home Wearable Industrial IoT Secure Gate Secure Network Multi-layer Protection

Smart Infrastructure & Connected Systems

Smart Infrastructure Traffic Power Water 5G/6G Control Hub Attacks Threats Resilient Protection

Smart infrastructure—from intelligent transportation systems to smart cities and industrial IoT—depends on billions of connected devices. Security failures can have cascading real-world consequences.

Historical Context: The 2016 Mirai botnet attack demonstrated the vulnerability of unprotected IoT devices. This watershed moment led to the development of IoT security standards and best practices. However, vulnerabilities persist.

Our Research Addresses:

  • Device Fingerprinting: Unique identification of devices in 5G and beyond networks
  • Distributed Attestation: Verifying integrity of devices in large-scale deployments
  • 5G Security: Next-generation wireless security for critical infrastructure
  • Robotic Systems: Security in teleoperation and edge computing for robotic applications

Secure Hardware Design for IoT

Security must be designed in from the ground up, not added as an afterthought. We work on hardware architectures and designs that provide security guarantees while meeting IoT constraints.

  • Security-by-Design: Incorporating security at the hardware architecture level
  • Medical IoT Security: Special focus on security-critical medical IoT devices and wearables
  • Edge Device Protection: Securing intelligence at the edge of networks
  • Supply Chain Security: Protecting IoT devices from manufacturing through deployment
Security-by-Design Design Phase Threat Modeling • Security Specifications Implementation Secure Hardware Modules • Cryptographic Cores Verification Security Testing • Formal Verification Supply Chain Authentication • Integrity Verification Integrated Security Architecture

🔗 Cross-Domain Security Tools & Techniques

Security Evaluation Frameworks

Security Evaluation Tools DLOVE Watermarking Security AGAN Encryption Evaluation Threats Assessment Tools Comprehensive Analysis Cross-domain Assessment Security Reports

Beyond developing individual defenses, we create comprehensive evaluation tools and frameworks to assess security across domains.

  • DLOVE: Security evaluation tool for deep learning-based watermarking techniques
  • AGAN (Attack GAN): Framework for evaluating perceptual encryption security using adversarial approaches
  • Threat Assessment Tools: Methodologies for evaluating system vulnerabilities across IoT, crypto, and AI domains

Integration of Security Domains

The future of security lies at the intersection of these domains. As AI systems are deployed on IoT devices protected by cryptographic hardware, we must ensure that security advances in one area complement others.

Our Integrated Approach: Understanding how adversarial robustness of ML models interacts with hardware security constraints, how IoT deployment affects cryptographic key management, and how physical side-channels can compromise AI systems.

Cross-Domain Integration AI Security Crypto Security IoT Security Integrated Security Interactions Synergies Comprehensive Coverage

Research Impact & Goals

Our Mission: MIST Lab aims to develop secure systems that protect against current and emerging threats while accommodating the real-world constraints of modern applications. We believe that security research must be both theoretically sound and practically implementable.

Guiding Principle: "With great power comes great responsibility"—as AI, cryptography, and IoT technologies become more powerful, our responsibility to secure them grows proportionally.

Publications

h-index: 17 | Total Citations: 969+ | Published Works: 305+

View complete profile: Google Scholar | DBLP | IEEE Xplore | ResearchGate

Complete Publications Database: This section includes 50+ peer-reviewed publications. For the most up-to-date and complete list with all co-authors and citations, visit the Google Scholar profile.

2025 Publications

Gradient-Guided Adversarial Patch Attack for Deep Neural Networks

R Kumar, U Kashyap, SS Ali

International Conference on Security, Privacy, and Applied Cryptography (SPACE), 2025 | Google Scholar

Fluorescent-Tagged Amphiphilic Polymers for Dual-Functional para-Nitrophenol Sensing and Remediation

S Maity, B Sahu, N Singh, SK Padhi, SKS Ali, S Banerjee

ACS ES&T Engineering, 2025 | Google Scholar

De-Fake: Style based Anomaly Deepfake Detection

SK Padhi, H Kumar, U Kashyap, SS Ali

arXiv:2507.03334 (2025) | Google Scholar

Is Perceptual Encryption Secure? A Security Benchmark for Perceptual Encryption Methods

U Kashyap, SK Padhi, SS Ali

IEEE Transactions on Artificial Intelligence, 2025 | Google Scholar

Deep Learning-based Dual Watermarking for Image Copyright Protection and Authentication

SK Padhi, Archana Tiwari, SS Ali

arXiv:2502.18501 (2025) | Google Scholar

2024 Publications

DefScan: Provably Defeating Scan Attack on AES-Like Ciphers

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 43 (2024)

IEEE | Google Scholar

Generalized Deepfake Attribution

ArXiv 2406.18278 (2024)

arXiv | Google Scholar

DLOVE: A new Security Evaluation Tool for Deep Learning Based Watermarking Techniques

ArXiv 2407.06552 (2024)

arXiv | Google Scholar

Attack GAN (AGAN): A new Security Evaluation Tool for Perceptual Encryption

ArXiv 2407.06570 (2024)

arXiv | Google Scholar

2023 Publications

On Securing Cryptographic ICs against Scan-based Attacks: A Hamming Weight Distribution Perspective

ACM Journal on Emerging Technologies in Computing Systems (JETCAS), March 2023

ACM | Google Scholar

Security Analysis of Scan Obfuscation Techniques

IEEE Transactions on Information Forensics and Security (TIFS), 2023

IEEE | Google Scholar

RoboSense At Edge: Detecting Slip, Crumple and Shape of the Object in Robotic Hand for Teleoprations

ArXiv 2311.07888 (2023)

arXiv | Google Scholar

2022 Publications

Evaluating Security of New Locking SIB-based Architectures

IEEE European Test Symposium (ETS), Barcelona, 2022

Authors: Yogendra Sao, Anjum Riaz, Satyadev Ahlawat, Sk Subidh Ali | Google Scholar

2021 Publications

Opacity preserving Countermeasure using Finite State Machines against Differential Scan Attacks

IEEE European Test Symposium (ETS), 2021

Authors: Sk Subidh Ali, Yogendra Sao, Santosh Biswas | Google Scholar

Security Analysis of State-of-the-art Scan Obfuscation Technique

IEEE International Conference on Computer Design (ICCD), 2021

Authors: Yogendra Sao, Sk Subidh Ali | Google Scholar

2020 Publications

Revisiting the security of static masking and compaction: Discovering new vulnerability and Improved Scan Attack on AES

IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 2020

Authors: Yogendra Sao, K. K. Soundra Pandian, Sk Subidh Ali | Google Scholar

2019 Publications

Co-relation Scan Attack Analysis (COSAA) on AES: A Comprehensive Approach

IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Noordwijk, Netherlands

Authors: D. Ray, S. Singh, Sk Subidh Ali, S. Biswas | Google Scholar

Guest Editorial - SPACE 2017 Special Issue

Journal of Hardware and Systems Security (HaSS)

Authors: Sk Subidh Ali, Debdeep Mukhopadhyay | Google Scholar

2017 Publications

Timing Attack and Countermeasure on NEMS Relay Based Design of Block Ciphers

IEEE Transactions on Emerging Topics in Computing

Authors: Bodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu | Google Scholar

2016 Publications

Thwarting Timing Attacks on NEMS Relay Based Designs

IEEE 34th VLSI Test Symposium (VTS)

Google Scholar

2015 Publications

Timing Attack on NEMS Relay Based Design of AES

IEEE International Symposium on Circuits and Systems (ISCAS)

Google Scholar

TMO: A New Class of Attack on Cipher Misusing Test Infrastructure

IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

Google Scholar

Test-mode-only Scan Attack Using the Boundary Scan Chain

IEEE VLSI Test Symposium (VTS)

ResearchGate | Google Scholar

Scan Attack on Elliptic Curve Cryptosystem

IEEE Fault Diagnosis and Tolerance in Cryptography Workshop (FDTC)

Semantic Scholar | Google Scholar

Security Analysis of Logic Encryption Against the Most Effective Side-Channel Attack: DPA

IEEE Fault Diagnosis and Tolerance in Cryptography Workshop (FDTC)

Google Scholar

Power Analysis Attacks on ARX: An Application to Salsa20

IEEE International On-Line Testing Symposium (IOLTS)

Google Scholar

Security Implications of Cyberphysical Digital Micro Biochips

IEEE International Conference on Computer Design (ICCD)

Google Scholar

2014 Publications

Test-mode-only Scan Attack and Countermeasure for Contemporary Scan Architectures

IEEE International Test Conference (ITC)

Authors: Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu, Ramesh Karri | Google Scholar

New Scan Attacks Against State-of-the-art Countermeasures and DFT

IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)

Authors: Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu, Ramesh Karri | Google Scholar

Pre-2014 Publications & Differential Fault Analysis Papers

New Scan-based Attack Using Only The Test Mode and an Input Corruption Countermeasure

Springer International Workshop on Information Security Theory and Practice (WISTP)

Springer | Google Scholar

Differential Fault Analysis of AES: Towards Reaching Its Limits

Journal of Cryptographic Engineering

Springer | ResearchGate

Differential Fault Analysis of the Advanced Encryption Standard Using a Single Fault

WISTP Workshop

Authors: Michael Tunstall, Debdeep Mukhopadhyay, Sk Subidh Ali | Google Scholar

Differential Fault Analysis of AES Using a Single Multiple-Byte Fault

Semantic Scholar | Google Scholar

Differential Fault Analysis of AES-128 Key Schedule Using a Single Multi-byte Fault

ResearchGate | Google Scholar

Differential Fault Analysis of Twofish

ResearchGate | Google Scholar

Improved Differential Fault Analysis of CLEFIA

Google Scholar

Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)

IEEE | ResearchGate

Scan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard

ResearchGate

A Comprehensive Design-for-Test Infrastructure In the Context of Security-Critical Applications

ResearchGate

An Extension of Differential Fault Analysis on AES

ResearchGate

Compact Implementation of Salsa20 and Its Power Analysis Vulnerabilities

NYU Cyber Security Center

On Improving the Security of Logic Locking

ResearchGate

A Secure Design-for-Test Infrastructure for Lifetime Security of SoCs

HAL Archive

Acceleration of Differential Fault Analysis of the Advanced Encryption Standard Using Single Fault

Google Scholar

Book Chapters & Editorials

Adversarial Malware Detection

Springer Nature Book Chapter (2024)

Springer

Security, Privacy, and Applied Cryptography Engineering - 7th International Conference, SPACE 2017

Springer (Edited by Sk Subidh Ali, Jean-Luc Danger, Thomas Eisenbarth)

Goa, India, December 13-17, 2017

Patents

Granted Patents

A System and Method for Defeating Scan Attacks on Cipher

Yogendra Sao and Sk Subidh Ali

Indian Patent No. 538348, Granted on 16-May-2024

Systems and Methods for Verifying Navigation Signals

Brejesh Lall, Sk Subidh Ali, Debanka Giri, and Sudev Kumar Padhi

Indian Patent No. 554204, Granted on 12-Nov-2024

A System and Method for Enhanced Grasp Stability by Detecting Slip, Crumple, and Shape of the Object in Robotic Hand

Sudev Padhi, Mohit Kumar, Debanka Giri, and Sk Subidh Ali

Indian Patent No. 557306, Granted on 31-Dec-2024

A System and Method for Detecting Fake Images with Source Attribution

Sudev Kumar Padhi, Indrakumar Mhaski, and Sk Subidh Ali

Indian Patent No. 575629, Granted on 11-December-2025

Patents Under Review

A Deep Learning Based System and Method for Dual Watermarking of Images

Sudev Kumar Padhi, Archana Tiwari, and Sk Subidh Ali

Indian Patent Application No. 202421009753, Filed on 19-July-2024

A System and Method for Detecting and Localizing Digital Document Forgery for Reconstruction of Tamper-Region

Sudev Kumar Padhi, Archana Tiwari, and Sk Subidh Ali

Indian Patent Application No. 202421094908, Filed on 3-Dec-2024

Systems and Methods for Verifying Navigation Signals

Brejesh Lall, Sk Subidh Ali, Debanka Giri, and Sudev Kumar Padhi

US Application No. 18/520,583, Filed on 12-Nov-2023

Research Impact

Citation Impact: With 969+ citations across 305+ publications, Dr. Ali's work has significant influence in the security and AI communities.

Research Domains: Deepfake Detection, Adversarial Machine Learning, Hardware Security, Scan-based Attacks, Cryptographic Implementation Security, Side-channel Analysis, IoT Security, and Image Authentication.

Contribution: Pioneering work in scan attacks on cryptographic hardware, defense mechanisms for secure IC design, and emerging research in adversarial robustness of deep learning systems.

Research Team

Interested in Joining?

MIST Lab is actively recruiting motivated students and researchers interested in security challenges across AI, cryptography, and IoT domains. If you are passionate about security research, we encourage you to reach out to discuss potential opportunities.

Contact: subidh@iitbhilai.ac.in

Latest News & Updates

Current Focus Areas

The lab continues to expand research in emerging areas of machine learning security and hardware trust. We are actively investigating new attack vectors and developing novel defense mechanisms.

Recent work has focused on the intersection of AI security and hardware security, exploring how physical attacks can compromise machine learning systems and vice versa.

Research Collaborations

MIST Lab collaborates with leading researchers and institutions worldwide. We welcome research visits, collaborations, and discussions with other groups working on related security challenges.

Publications

Our research is published in leading conferences and journals. Recent work has been presented at top-tier venues and has received significant citations from the research community.

For a complete list of publications and research outputs, please visit our research group pages and Google Scholar profiles.

Research Funding

Ongoing Projects

Detection of Financial Frauds

Agency: IIT BHILAI Innovation and Technology Foundation

Project: Detection of financial frauds in taxation, banking, and stock market

Ongoing

5G & Beyond Research

Agency: MeitY

Project: Next Generation Wireless Research and Standardization on 5G & Beyond

Ongoing

Smart Card OS Testing

Agency: BEL

Project: Testing and certifying MISCOS Operating System for Smart Card

Ongoing

Completed Projects

5G Testbed Development

Agency: MeitY

Project: Building End to End 5G Testbed (Distributed attestation of Devices & Device Fingerprinting)

Completed

Contact Information

Principal Investigator

Dr. Sk Subidh Ali

Room 412, ED1, IIT Bhilai

Kutelabhala

Durg - 491002

Institute Profile

View Faculty Profile

Get in Touch

We welcome inquiries about collaboration, student recruitment, research partnerships, and general discussions about our work. Please feel free to reach out to us using the contact information above.

Location

Find us at IIT Bhilai, Kutelabhala, Durg. Below is our exact location on the map: